Showing posts with label tilera. Show all posts
Showing posts with label tilera. Show all posts

Friday, 11 September 2009

Multi-core Processors are Key to Security


MIT Professor and Turing Award Winner Ron Rivest knows a thing or two about security. He invented the RC2, RC4, and RC5 symmetric key encryption algorithms (RC=Rivest Cipher), as well as the MD2, MD4 and MD5 hashing algorithms. He's also the R in RSA, so I got to know him when Jim Bidzos and I were getting VeriSign off the ground (not to mention a few friendly poker games we shared).

Anyway, the community of security researchers continuously strengthen their algorithms to withstand the steady onslaught of attack from cryptographers with increasingly powerful computers. So Rivest has been developing his newest MD6 algorithm on Tilera multi-core processors. Tilera is a Bessemer company that has integrated 64 processors with independent memory, caches and network ports on a single chip known as Tile64.

According to this article from a recent MIT campus paper, NIST won't adopt MD6 as a standard because it's just too slow to run without the Tile64. The inescapable conclusion is that as long as we continue to buy computers built on stale platforms, our security algorithms will be vulnerable to hackers with newer toys.

Monday, 22 December 2008

Tilera: "The Startup To Watch"

This month the Global Semiconductor Alliance recognized Tilera as the Startup To Watch for 2009. Congratulations to founder Vijay Agarwal and his co-founders Devesh Garg (now a partner in Bessemer's Mumbai office) and MIT Professor Anant Agarwal! And kudos to my partner Rob Chandra, who funded and incubated the company in our Massachusetts office.

Tilera has transformed multicore computing by designing a truly distributed chip architecture where each processing core (or "tile") has its own resources such as caches and network nodes. This architecture solves major problems around performance (centralized resources are a bottleneck) and scalability (we're already running 64 tiles on a chip and we'll soon double that). We use industry standard programming tools, running C and C++ code on SMP Linux so it's easy to migrate an existing application to our fully parallel platform. Simply put, Tilera has extended the benefits of distributed computing from PCs down to the chip level.

I'm personally most excited about the impact Tilera will have on security appliances, which increasingly need to process large streams of packets in real time in order to prevent malware, identify predatory behavior, and combat terrorism. Replacing all the FPGAs, DSPs and ASICs in such an appliance, a single Tilera chip is perfect for high volume computational tasks like packet filtering that can be processed in parallel. (Devesh had first recognized this need when he was GM of Broadcom's Security Business Unit.) Tilera fits many other applications as well in processing communications and video (e.g. H.264 codecs) --in fact, we have nearly 50 customers in various stages of design.

The distributed architecture also leads to a greener power profile. By replicating and distributing the circuits, the electron pathways are much shorter, which consumes less power and generates less heat.
Blogged with Flock